Thin polished plates such as silicon wafers and the like are a very important part of modern technology. A wafer, for instance, may refer to a thin slice of semiconductor material used in the fabrication of integrated circuits and other devices. Other examples of thin polished plates may include magnetic disc substrates, gauge blocks and the like. While the technique described here refers mainly to wafers, it is to be understood that the technique also is applicable to other types of polished plates as well. The term wafer and the term thin polished plate may be used interchangeably in the present disclosure.
Generally, certain requirements may be established for the flatness and thickness uniformity of the wafers. The semiconductor industry uses the two global wafer shape metrics, bow and warp, to describe the overall wafer shape. Global surface fitting using the Zernike polynomials or Taylor polynomials have also been used to describe the wafer shape components.
However, the two global wafer shape metrics, bow and warp, do not have the required spatial resolution and sensitivity for the local wafer shape characterization. Methods based on the whole wafer surface fitting cannot provide the information about the location of wafer local higher order shape components and often do not have good shape sensitivity even with very high polynomial fitting orders.
Therein lies a need for systems, methods and metrics for wafer high order shape characterization and wafer classification without the aforementioned shortcomings.